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STV0991
Advanced HDR ISP with dedicated HW engines for video analytics and lens correction

热度 106

STV0991 is a versatile system-on-chip device designed for automotive, security and a multitude of other camera applications. From video and audio input through HDR image signal processing, lens distortion correction, graphics overlay, video compression, video analytics acceleration, CPU, operating and non-volatile memory, media access controller, to video and audio outputs and communication interfaces, it comprises all elements to support compact, low bill-of-material and low energy-consuming camera applications. No external memory chips such as DRAM or Flash are required for its operation, predictive H.264 video encoding inclusive.

Video analytics accelerators unload central CPU from intensive repetitive tasks. A graphics renderer unit compensates for perceptual distortion produced by wide lenses such as fish eye lenses and inserts graphical and/or textual information over the video. Resulting ready-for-display video can be output as-is over the parallel or serial video output port or real-time compressed for streaming out through one of RGMII/GMII, SDIO or SPI interfaces. An audio signal can be input via one of I2S or PDM inputs, processed by the CPU and inserted into the output data stream. A return audio channel is also supported, outputting the audio on I2S output. Precise Time Protocol (PTP) support and other provisions on the die allow reaching precise synchronization of exposure instant of cameras of a multi-camera system, independent of cable lengths. A cryptographic and hash unit permits the protecting of customer intellectual property embedded in their software. Flash content can be updated via communication interfaces, thus allowing non-intrusive customer firmware updates. A debug access port (DAP) helps users in their software development process. The application diagram in Figure 1 suggests some of possible applications through combining optional elements as required.


  • Self-containing, no external memory needed
  • Central system
    • ARM ? Cortex-R4 CPU @ 500 MHz
    • Up to 2 Mbyte of SRAM
    • Up to 2 Mbyte of stacked flash or 16 Mbyte external flash with update via communication interfaces
    • Emulated EEPROM in flash content
    • Interrupt and DMA controllers
  • HDR on-the-fly Image signal processing
    • 150 Mpixel/s effective throughput, 5 Mpixel spatial resolution and 22 bit front-end processing
    • Global tone mapping and gamma
    • Lens anti-shading, noise suppression, defective pixel repair, sharpening, adaptive color matrix, multiple scaling engines
    • Image statistics engine for 3 A support
  • Video compression
    • JPEG 8-bit/12-bit, 5/2.1 Mpixel@30fps
    • H.264 baseline I,P, 2.1 Mpixel@30fps
  • Video analytics accelerators
    • Edge data extractor
    • Optical flow generator
  • Lens mapping (e.g. fish-eye) correction
  • Graphics overlay
  • Code protection against hacking
  • Multi-camera synchronization support
  • Operation with quartz or external clock
  • Interfaces
    • Serial (CSI-2) and parallel video in and out
    • RGMII/GMII, 2x SDIO, 2x SPI, 3x I2 C, CAN, 6x LIN, multiple GPIO’s with 4x ADC in
    • I2 S in, I2 S out, PDM for digital microphone
    • Clock output for image sensor
  • ASIL-related features
  • Low power consumption
  • -40°C to +105°C operating Ta range
  • AEC-Q100 grade 2 compliance

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影像信号处理器(ISP)

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